Unfolding the Leech Lattice: Fused Multi-Shell Decoding and VRAM Layouts for 2-Bit LLM Weights
cs.LG
Quick verdict
Claims first multi-shell Leech-lattice 2-bit decoder and in-VRAM rate costs; rigorously measured and honest, but MMLU deficit unexplained, gains modest.
Summary
The paper presents the first documented serving implementation of the full multi-shell Leech-lattice decoder (301 permutation classes of the Λ24(12) ball, 47-bit index) required by 2-bit LLVQ quantization, whose published kernel decoded only one shell. The 47-bit combinatorial index is unfolded offline into decoded-field records read by a divergence-free fused dequantize-plus-matvec CUDA kernel, with every output row verified against f64. Four bit-exact layouts timed in one process on an L40S (3.59–5.51 bits/weight) show binary bit planes (Planes14, 4.80 b/w, 2.15× FP16) beating one-hot masks; an exception side channel degrades 4.34 b/w and the shifts-and-masks decode collapses at 3.59. In the same process, the QTIP 2-bit kernel reads 2.40× fewer bytes (0.91 vs 2.18 GB) and runs 2.27× faster, so the unfolding cost is paid in traffic; launch geometry accounts for 39% of the gap to the DRAM floor and projection fusion recovers 11.7%. On an A100 all lattice arms fall below FP16. End-to-end same-head gains are 1.11×/1.29×/1.41× at 4B/8B/14B; with an int8 head the served 4B reaches 87.0 tok/s in 2.60 GB. Quality costs ×1.38 perplexity and about 14.7 MMLU points at 4B, shrinking with size; the MMLU deficit is unexplained, with calibration composition the leading untested suspect. Limitations: batch-1 decode only, three model sizes, and no measured AQLM/VPTQ baselines.
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Assessment at a glance
5
risk flags identified
● high 0
● medium 2
● low 3
5 strengths · 5 weaknesses · 5 author questions
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Key claims under review
- This is the first publicly documented serving implementation of the full multi-shell Λ24(12) Leech-lattice codebook (301 classes, 47-bit index), executed as a divergence-free fused dequantize-plus-matvec kernel verified against f64, reaching 65% of its byte bound on an L40S (§2).
- The in-VRAM rate is a design axis distinct from the on-disk rate: binary bit planes (Planes14, 4.804 b/weight) beat one-hot masks at constant bandwidth, and the shifts-and-masks decode regime collapses below roughly 3.6 b/weight (§3.2).
- In one process, the deployed QTIP 2-bit kernel reads 2.40× fewer bytes than the served Planes14 layout and runs 2.27× faster at near-equal fractions of their byte bounds, locating the cost of unfolding a 1.1×10¹⁴-point codebook in memory traffic (§3.3).
- With the output head held identical, the kernel-and-format path gains 1.11×/1.29×/1.41× end to end at 4B/8B/14B on L40S; on an A100 every lattice arm falls below FP16, bounding the headline to the bandwidth-bound regime (§3.5, §4).
- Two-bit quality costs ×1.384 perplexity and about 14.7 MMLU points at 4B, shrinking at 8B and 14B, with no scaling law claimed from three models and the MMLU deficit unexplained (§5, §6).
Strengths
Fills a genuine systems gap with an unusually deep verification stack
First documented decoder for the full 301-class multi-shell Λ24(12) codebook (§2). Correctness is layered: bit-exact transcoding across all 150,681,600 artifact blocks with mutation testing (~25 mutants killed), all 1,105,920 output rows checked against an independent f64 reference before any timing (worst 3.4×10⁻⁸), and combinatorial invariant locks (kissing number 196,560, theta-series coefficients, class-cardinality sum N(13)=280,974,212,784,720).
Exemplary measurement honesty and provenance
Pre-registered acceptance criteria with committed dates and OpenTimestamps proofs (Table 13); every figure/table traced to committed CSVs and measurement journals (Table 14); a no-weights control (4.77×) that exposes the authors' own launch geometry as the binding floor — QTIP's 4.89× barely clears it; the negative A100 result (all lattice arms below FP16, §3.5) is published rather than buried; five distinct rate definitions tabulated and never cross-compared (Table 4).
Clean conceptual contribution: in-VRAM rate as a design axis
Statistical care rare in systems papers
Fully reproducible artifact
Weaknesses
The MMLU deficit is unexplained and may be partly a calibration artifact
Headline throughput conflates kernel gain with an orthogonal head replacement
Narrow comparison scope for a serving paper
Single calibration draw and three sizes for the scale story
Competitor timing arms use synthetic payload
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Preliminary Review: Unfolding the Leech Lattice (arXiv 2609.02652)
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Frequently asked questions
What does this paper add over the original Leech lattice quantization (LLVQ) paper?
The original LLVQ paper showed the best reported 2-bit quality but its CUDA kernel decoded only a single lattice shell, so the multi-shell decoder its 2-bit rate actually requires was never implemented. This paper supplies the first documented implementation of that full decoder (301 coordinate-permutation classes of the Λ24(12) ball) and measures what serving it costs in GPU memory traffic and time.
Is the 2-bit model actually faster than FP16?
It depends on the GPU. On an NVIDIA L40S (GDDR6) at batch 1, the served layout runs the projection kernels 2.15× faster than FP16 and end-to-end gains are 1.11×–1.41× depending on model size (or 2.00× if the output head is also replaced with an int8 kernel). On an A100 (HBM2e), every lattice variant is slower than FP16, so the gains are specific to bandwidth-bound, single-stream decoding on that class of card.
How does it compare to QTIP or AWQ?
In the same process, the deployed QTIP 2-bit kernel reads 2.40× fewer bytes and runs 2.27× faster than this paper's served layout — the price of unfolding a codebook too large for a lookup table. On quality at the same 2.000 bits/weight code rate, results are comparable in their respective harnesses at 4B on perplexity (×1.38 vs ×1.37), though the 2-bit MMLU deficit here (−14.7 points at 4B) is wider than the source paper's numbers suggest and its cause is unexplained. AWQ 4-bit keeps essentially full quality but uses more memory.
What is the quality cost of using this 2-bit format?
Measured on Qwen3 models without fine-tuning: at 4B, perplexity rises ×1.38 and MMLU drops about 14.7 points versus FP16; at 8B the cost falls to ×1.22 and −10.6 points, and at 14B to ×1.19 and −6.9 points. The authors publish no scaling law from these three points and note the reasoning-heavy subjects lose the most.
About this review
This is an AI-generated preliminary review by Evolve.Pub, produced from the openly available text of the paper. It is not peer review and does not represent the authors' views. The canonical record of the paper is at the publisher link above.
- Figures are available only as interleaved text/axis labels in the extraction (e.g., Fig 3's curve and Fig 5's bars), so figure-level visual claims were assessed from captions and tables, not the rendered plots.
- Table 7's competitor rows are transcriptions of the source LLVQ paper's tables (per §5), not re-measured values; they are treated here as quoted, not verified.
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