Tulika Mitra

Research profile

Research summary

Tulika Mitra is a researcher at the National University of Singapore working at the interface of computer architecture, embedded systems, and — most recently — efficient generative computer vision. The OpenAlex snapshot credits an h-index of 44 and an i10-index of 137, with indexed output stretching back to 1995 and 37 works in the last three years, including a peak of 17 indexed works in 2025. Topic clustering shows a long-standing core in embedded systems design techniques (183 works), parallel computing and optimization (177), and real-time systems scheduling (105), with further clusters in VLSI/FPGA design (58) and low-power design (50). Current activity splits evenly (0.5/0.5) between two fronts: edge-AI inference on heterogeneous SoCs and efficient generative models. Two 2026 arXiv papers in the Evolve catalog illustrate this dual track. Para-Pipe exploits hierarchical operator parallelism of ML computational graphs on SoCs, with solid gains measured on Amlogic hardware but simulation-only results for the BST platform. The adaptive step schedule controller (ADSC) paper cuts Stable Diffusion 1.5 inference to roughly 19 steps training-free, beating matched fixed-step baselines on CLIP-I and DINO, although Evolve flags its evaluation as self-referential with key thresholds unreported. In both papers Mitra is the last-listed author, consistent with a senior supervisory role. Reproducibility across the two reviewed papers averages 38, with medium and low readiness respectively.

Research keywords

Highlights

• Training-free step scheduling cuts Stable Diffusion 1.5 to ~19 steps

  The 2026 ADSC paper introduces an adaptive step schedule controller that reduces SD1.5 inference to roughly 19 steps without retraining, outperforming matched fixed-step baselines on CLIP-I and DINO; Evolve notes the evaluation is self-referential and key thresholds unreported.

• Hierarchical operator parallelism for ML graphs on heterogeneous SoCs

  Para-Pipe (2026) pipelines ML computational graphs across heterogeneous SoC components while exploiting operator-level parallelism, balancing latency, throughput and energy; measured gains on Amlogic hardware are solid, while BST-platform results remain simulation-only.

• Even split between edge-AI architecture and efficient generative models

  The 2026 record splits evenly between edge-AI inference on heterogeneous SoCs and efficient generative computer vision, with both catalog papers placing the researcher in the last author position — a recent pivot layered on a long-standing embedded-systems and real-time core.

Timeline

1. 1995Earliest indexed publication year in the OpenAlex snapshot, with 1 indexed work.
2. 2008Indexed output reaches 16 works, within a sustained high-output stretch that runs from 2003 (15 works) through 2010 (9 works).
3. 2013Reaches a career-high 17 indexed works in a single year.
4. 2025Matches the yearly high again with 17 indexed works, closing a three-year window totaling 37 works.
5. 2026Two arXiv preprints enter the Evolve catalog — Para-Pipe on hierarchical operator parallelism for SoCs and ADSC for diffusion step scheduling — as the field distribution splits evenly between edge-AI architecture and efficient generative models.

Papers in the Evolve catalog

• 2026-09-17

  Efficient Text-to-Image Generation: An Adaptive Step Schedule Controller for Diffusion Models

• 2026-09-03

  Para-Pipe: Exploiting Hierarchical Operator Parallelism of ML Computational Graphs on SoCs

Frequent co-authors